Paper Info
Title
M-TREE: a high efficiency security architecture for protecting integrity and privacy of software
Abstract
Secure processor architectures enable new sets of applications such as commercial grid computing, software copy protection and secure mobile agents by providing secure computing environments that are immune to both physical and software attacks. Despite a number of secure processor designs have been proposed, they typically made trade-offs between security and efficiency. This article proposes a new secure processor architecture called M-TREE, which offers a significant performance gain while without compromising security. The M-TREE architecture uses a novel hierarchical Message Authentication Code Tree (MACTree) for protecting applications' integrity at a minimal performance overhead. M-TREE also introduces a new one-time-pad class encryption mechanism that accelerates security computation over the existing block cipher-based schemes with high security guarantee. Based on the results of our performance simulation, the performance overhead of the M-TREE integrity check mechanism is as small as 14% in the worst case, a substantial improvement over the 60% slowdown reported by previously proposed techniques. Meanwhile, the overhead of M-TREE encryption scheme is approximately 30%, compared to 50% of using block cipher encryption. In overall, our M-TREE architecture can provide a tamper-resistant and tamper-evident computing environment with low-performance impact, thereby offering a transparent and practical security computing platform.
Year
DOI
Venue
2006
10.1016/j.jpdc.2006.04.011
J. Parallel Distrib. Comput.
Keywords
Field
DocType
data integrity and encryption,m-tree integrity check mechanism,trusted computing,processor architecture,high security guarantee,security and privacy,high efficiency security architecture,practical security computing platform,m-tree architecture,m-tree encryption scheme,secure processor design,new secure processor architecture,secure mobile agent,secure computing environment,secure processor architecture,grid computing,tamper resistance,one time pad,security architecture,secure computation,message authentication code,data integrity,mobile agent,block cipher
Trusted Computing,Message authentication code,Block cipher,Computer science,Cryptography,Software security assurance,Parallel computing,Computer network,Encryption,Data integrity,Enterprise information security architecture,Distributed computing
Journal
Volume
Issue
ISSN
66
9
Journal of Parallel and Distributed Computing
Citations 
PageRank 
References 
4
0.44
9
Authors
4
Name
Order
Citations
PageRank
Chenghuai Lu114210.02
Tao Zhang212711.52
Weidong Shi333141.44
Hsien-Hsin Sean Lee41657102.66