Name
Title | ||
|---|---|---|
Acceleration of First and Higher Order Recurrences on Processors with Instruction Level Parallelism |
Abstract | ||
|---|---|---|
This report describes parallelization techniques for accelerating a broad class of recurrences on processors with instruction level parallelism. We introduce a new technique, called blocked back-substitution, which has lower operation count and higher performance than previous methods. The blocked back-substitution technique requires unrolling and non-symmetric optimization of innermost loop iterations. We present metrics to characterize the performance of software-pipelined loops and compare these metrics for a range of height reduction techniques and processor architectures. |
Year | DOI | Venue |
|---|---|---|
1993 | 10.1007/3-540-57659-2_24 | LCPC |
Keywords | Field | DocType |
blocked back-substitution,software pipeline,back- substitution,higher order recurrences,height reduction,recurrences,loop optimization,parallelism,instruction level parallelism,processor architecture,higher order,software pipelining | Instruction-level parallelism,Software pipelining,Computer science,Parallel computing,Loop optimization,Loop inversion,Data parallelism,Acceleration,Cycles per instruction | Conference |
ISBN | Citations | PageRank |
3-540-57659-2 | 7 | 1.22 |
References | Authors | |
11 | 2 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Michael S. Schlansker | 1 | 372 | 43.35 |
| Vinod Kathail | 2 | 340 | 35.85 |