Name
Abstract | ||
|---|---|---|
There are several challenges facing RFIC design and test. The demand in the wireless market will drive RFIC products. For RFIC chipsets, improvements are needed for the elimination of passive components, better integrated passives, power reduction, modeling of devices and interconnects, packaging, and cost-effective testing. However, this innovation cannot come at the cost of time to market for new products. Also, development costs must be driven to a minimum, as average selling prices for RFICs remain flat or decline. Moreover, one of the biggest challenges in moving from low GHz to higher frequencies is the lack of integration between the production testing infrastructure, EDA tools, and device designs. Advancements in device and test equipment modeling and simulation technology are beginning to bridge this gap. Finally, RF measurement requires specialized capital equipment investments and highly skilled engineers with many years of experience. This special issue on design and test of RFIC chips describes some of these challenges and proposes some interesting solutions. |
Year | DOI | Venue |
|---|---|---|
2008 | 10.1109/MDT.2008.13 | IEEE Design & Test of Computers |
Keywords | Field | DocType |
test equipment modeling,production testing infrastructure,rfic chip,specialized capital equipment investment,rfic product,rfic design,rfic chipsets,cost-effective testing,wireless market,guest editors,device design,packaging,modeling and simulation,testing,frequency,chip,cmos technology,production,wireless,cost effectiveness | Wireless,Modeling and simulation,Computer science,Electronic engineering,CMOS,Electronic design automation,RFIC,Time to market,Chipset,Electronic component,Computer engineering | Journal |
Volume | Issue | ISSN |
25 | 1 | 0740-7475 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Bruce C. Kim | 1 | 89 | 21.11 |
| Craig Force | 2 | 6 | 1.64 |