Title | ||
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A CMOS Beta Multiplier Voltage Reference with Improved Temperature Performance and Silicon Tunability |
Abstract | ||
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A new implementation has been proposed for the beta multiplier voltage reference to improve its performance with regard to process variations. The scope for silicon tunability on the proposed circuit is also discussed. The circuit was implemented in a 0.18 μ process and was found to have a temperature sensitivity of less than 500 ppm/C in the virgin die without trimming. |
Year | DOI | Venue |
---|---|---|
2004 | 10.1109/ICVD.2004.1260977 | VLSI Design |
Keywords | Field | DocType |
silicon tunability,new implementation,improved temperature performance,cmos beta multiplier voltage,virgin diewithout trimming,thebeta multiplier voltage reference,proposed circuit isalso,process variation,trimming,photonic band gap,silicon,semiconductor device modeling,intrusion detection,threshold voltage,cmos integrated circuits | Hybrid silicon laser,Computer science,Voltage reference,Electronic engineering,CMOS,Multiplier (economics),Silicon bandgap temperature sensor,Trimming,Bandgap voltage reference,Silicon | Conference |
ISBN | Citations | PageRank |
0-7695-2072-3 | 4 | 1.03 |
References | Authors | |
0 | 2 |
Name | Order | Citations | PageRank |
---|---|---|---|
S. S. Prasad | 1 | 4 | 1.03 |
Pradip Mandal | 2 | 84 | 23.04 |