Title
A generic architecture of CCSDS low density parity check decoder for near-earth applications
Abstract
Low Density Parity Check (LDPC) codes have recently been chosen in the CCSDS standard for uses in near-earth applications. The specified code belongs to the class of Quasi-Cyclic LDPC codes which provide very high data rates and high reliability. Even if these codes are suited to high data rate, the complexity of LDPC decoding is a real challenge for hardware engineers. This paper presents a generic architecture for a CCSDS LDPC decoder. This architecture uses the regularity and the parallelism of the code and a genericity based on an optimized storage of the data. Two FPGA implementations are proposed: the first one is low-cost oriented and the second one targets high-speed decoder.
Year
DOI
Venue
2009
10.1109/DATE.2009.5090854
DATE
Keywords
Field
DocType
high reliability,high data rate,specified code,near-earth application,quasi-cyclic ldpc code,generic architecture,targets high-speed decoder,ccsds low density parity,check decoder,ldpc decoding,ccsds ldpc decoder,ccsds standard,fpga implementation,model based design,reliability,retiming,probability density function,decoding,fpgas,data mining,data systems,field programmable gate arrays,high level synthesis,ldpc code,throughput,bipartite graph,space technology,low density parity check
Retiming,Computer science,Low-density parity-check code,Parallel computing,High-level synthesis,Field-programmable gate array,Model-based design,Soft-decision decoder,Throughput,Decoding methods
Conference
ISSN
Citations 
PageRank 
1530-1591
2
0.36
References 
Authors
5
5
Name
Order
Citations
PageRank
Fabien Demangel120.36
Nicolas Fau291.29
Nicolas Drabik320.36
François Charot413615.93
Christophe Wolinski529728.34