Title
Live demonstration: High fill factor CIS based on single inverter architecture
Abstract
This live demonstration presents a high fill factor 6 transistor per pixel CMOS image sensor (CIS) based on a single inverter that modulates light illumination to pulse width supporting ultra low supply voltage requirements. It has a compact readout circuitry for pulse-based signal processing without A/D converter at the output. A 64 × 64 pixel array was fabricated using 130 nm CMOS technology. The chip operated under a +VDD as low as 500 mV with power consumption of only 27 nW per pixel. The fill factor is 58%, which is significantly larger than those conventional CMOS imagers.
Year
DOI
Venue
2012
10.1109/ISCAS.2012.6272142
ISCAS
Keywords
Field
DocType
single inverter architecture,pulse-based signal processing,signal processing,analogue-digital conversion,cmos image sensors,high fill factor,light illumination,a/d converter,transistor per pixel,cmos image sensor,transistors,cmos integrated circuits,computer architecture,lighting,photodiodes
Inverter,FO4,Computer science,Pulse-width modulation,Electronic engineering,Chip,CMOS sensor,CMOS,Transistor,Electrical engineering,Photodiode
Conference
ISSN
ISBN
Citations 
0271-4302
978-1-4673-0218-0
0
PageRank 
References 
Authors
0.34
1
4
Name
Order
Citations
PageRank
Sang-jin Lee136040.96
Omid Kavehei227331.47
Kamran Eshraghian310127.54
Kyoung-Rok Cho421731.77