| Adaptive Precision CNN Accelerator Using Radix-X Parallel Connected Memristor Crossbars. | 0 | 0.34 | 2019 |
| Neuromorphic Vision Hybrid RRAM-CMOS Architecture. | 3 | 0.41 | 2018 |
| Formulation And Implementation Of Nonlinear Integral Equations To Model Neural Dynamics Within The Vertebrate Retina | 2 | 0.45 | 2018 |
| Maximization of Crossbar Array Memory Using Fundamental Memristor Theory. | 0 | 0.34 | 2017 |
| Memristor-CMOS logic and digital computational components | 11 | 0.64 | 2015 |
| High Fill Factor Low-Voltage CMOS Image Sensor Based on Time-to-Threshold PWM VLSI Architecture | 0 | 0.34 | 2014 |
| Live demonstration: High fill factor CIS based on single inverter architecture | 0 | 0.34 | 2012 |
| Memristive Device Fundamentals and Modeling: Applications to Circuits and Systems Simulation | 24 | 1.51 | 2012 |
| An Analytical Approach for Memristive Nanoarchitectures | 22 | 2.61 | 2011 |
| Memristor-based Synaptic Networks and Logical Operations Using In-Situ Computing | 7 | 1.29 | 2011 |
| 3-D System-on-System (SoS) Biomedical-Imaging Architecture for Health-Care Applications. | 6 | 1.07 | 2010 |
| System-on-System (SoS) architecture for 3-D secure imaging. | 0 | 0.34 | 2009 |
| "Surfing the iSoC multitechnology platform: Volumetric growth beyond Moore's law | 0 | 0.34 | 2008 |
| 3D-softchip: a novel architecture for next-generation adaptive computing systems | 0 | 0.34 | 2006 |
| Pixel Structure Effects on Crosstalk in Backwall Illuminated CMOS Compatible Photodiode Arrays | 1 | 0.63 | 2004 |
| Integrated MicroPhotonic Broadband Smart Antenna Beamformer | 0 | 0.34 | 2004 |
| Integrated MicroPhotonic Wideband RF Interference Mitigation Filter | 0 | 0.34 | 2004 |
| MicroPhotonic Reconfigurable RF Signal Processor | 1 | 0.38 | 2004 |
| Dynamic MicroPhotonic WDM Equalizer | 1 | 0.63 | 2004 |
| Testing and Analysis of Computer Generated Holograms for MicroPhotonic Devices | 0 | 0.34 | 2004 |
| Reconfigurable MicroPhotonic Add/Drop Multiplexer Architecture | 0 | 0.34 | 2004 |
| Multi-band MicroPhotonic Tunable Optical Filter | 0 | 0.34 | 2004 |
| SOC-B design and testing technique of IS-95C CDMA transmitter for measurement of electric field intensity using FPGA and ASIC | 0 | 0.34 | 2004 |
| Knowledge-based genetic algorithm for layer assignment | 1 | 0.37 | 2001 |
| A Cmos Circuit For High Speed Flexible Read-Out Of Cmos Imagers | 1 | 0.43 | 2000 |
| Deep Submicron USLI Design Paradigm: Who is Writing the Future? | 0 | 0.34 | 2000 |
| Parallel Architecture for the Implementation of the Embedded Zerotree Wavelet Algorithm | 0 | 0.34 | 2000 |
| EZW algorithm using depth-first representation of the wavelet zerotree. | 1 | 0.37 | 1999 |
| Self-Timed Techniques for Low-Power Digital Arithmetic in GaAs VLSI | 0 | 0.34 | 1999 |
| Massively parallel wavelet based video codec for an intelligent-pixel mobile multimedia communicator | 1 | 0.39 | 1999 |
| A novel latch design technique for high speed GaAs circuits | 0 | 0.34 | 1999 |
| Self-timed MESFET gallium arsenide circuit techniques for a direct digital frequency synthesiser. | 0 | 0.34 | 1999 |
| Robust image compression using the depth-first search on the wavelet zerotree. | 0 | 0.34 | 1999 |
| System analysis of an intelligent pixel mobile multimedia communicator. | 0 | 0.34 | 1999 |
| VLSI decoder architecture for embedded zerotree wavelet algorithm | 3 | 0.63 | 1999 |
| A parameter search technique to build an ARMA model | 1 | 0.52 | 1998 |
| Neu-MOS (νMOS) for smart sensors and extension to a novel neu-GaAs (νGaAs) paradigm | 0 | 0.34 | 1998 |
| Design methodology and performance estimation for complementary gallium arsenide | 0 | 0.34 | 1998 |
| A Tabular Method for Guard Strengthening, Symmetrization, and Operator Reduction for Martin's Asynchronous Design Methodology | 0 | 0.34 | 1997 |
| GaAs pseudodynamic latched logic for high performance processor cores | 5 | 1.07 | 1997 |
| An asynchronous morphological processor for multi-media applications | 0 | 0.34 | 1997 |
| Opto-VLSI Systems for Multimedia Computing | 1 | 0.36 | 1997 |
| Delay Hazards in Complex Gate Based Speed Independent VLSI Circuits | 1 | 0.36 | 1996 |
| Dynamic hazards and speed independent delay model. | 1 | 0.36 | 1996 |
| Biologically Inspired Obstacle Avoidance - A Technology Independent Paradigm | 0 | 0.34 | 1995 |
| An Adaptive Tracking Controller Using Neural Networks For Nonlinear Systems | 2 | 1.16 | 1995 |
| A 32-bit GaAs IEEE floating point multiplier using Trailing-1's rounding algorithm | 0 | 0.34 | 1995 |
| Feature Representation Of Motion Trajectories | 1 | 0.50 | 1995 |
| Multiplicative noise cancellation (MNC) in analog VLSI vision sensors | 2 | 1.72 | 1995 |
| The Impact Of Vlsi Technologies On Neural Networks | 2 | 0.56 | 1995 |
