Name
Title | ||
|---|---|---|
Design for Testability: Using Scanpath Techniques for Path-Delay Test and Measurement |
Year | DOI | Venue |
|---|---|---|
1991 | 10.1109/TEST.1991.519696 | ITC |
Keywords | Field | DocType |
path-delay test,scanpath techniques,design for testability,frequency | Discrete circuit,Design for testing,Automatic test pattern generation,Computer science,Circuit extraction,Circuit design,Electronic engineering,Real-time computing,Integrated circuit design,Mixed-signal integrated circuit,Physical design | Conference |
ISSN | ISBN | Citations |
1089-3539 | 0-8186-9156-5 | 105 |
PageRank | References | Authors |
7.00 | 3 | 2 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Bulent I. Dervisoglu | 1 | 116 | 10.56 |
| Gayvin E. Stong | 2 | 105 | 7.34 |