Title
Configuration-Specific Test Pattern Extraction for Field Programmable Gate Arrays
Abstract
The aim of this paper is to present a methodology for extracting configuration-specific test patterns for FPGA cells, from the set of sequences that test all stuck-at-faults for the unconfigured cell. This is achieved through the construction of an automaton that recognizes test sequences for all faults, followed by the extraction of a second automaton that recognizes only the non-redundant faults with respect to a given configuration. Since structural information is not needed for sequence extraction, this methodology provides the user with a structural fault model while granting protection of Intellectual Property.
Year
DOI
Venue
1997
10.1109/DFTVS.1997.628313
DFT
Keywords
Field
DocType
unconfigured cell,structural fault model,sequence extraction,intellectual property,fpga cell,configuration-specific test pattern,structural information,field programmable gate arrays,non-redundant fault,configuration-specific test pattern extraction,test sequence,manufacturing,automata,data mining,intellectual property protection,field programmable gate array,application specific integrated circuits
Stuck-at fault,Automatic test pattern generation,Computer science,Automaton,Programmable logic array,Automatic testing,Field-programmable gate array,Electronic engineering,Application-specific integrated circuit,Computer engineering,Fault model
Conference
ISBN
Citations 
PageRank 
0-8186-8168-3
2
0.40
References 
Authors
7
4
Name
Order
Citations
PageRank
Fabrizio Ferrandi154856.95
Franco Fummi21001111.62
L. Pozzi321.08
Mariagiovanna Sami431439.98