Title
A Zero-IF 60 GHz 65 nm CMOS Transceiver With Direct BPSK Modulation Demonstrating up to 6 Gb/s Data Rates Over a 2 m Wireless Link
Abstract
This paper presents a directly modulated, 60 GHz zero-IF transceiver architecture suitable for single-carrier, low-power, multi-gigabit wireless links in nanoscale CMOS technologies. This mm-wave front end architecture requires no upconversion of the baseband signals in the transmitter and no analog-to-digital conversion in the receiver, thus minimizing system complexity and power consumption. All...
Year
DOI
Venue
2009
10.1109/JSSC.2009.2022918
IEEE Journal of Solid-State Circuits
Keywords
Field
DocType
Transceivers,Binary phase shift keying,CMOS technology,Radio transmitters,Baseband,Analog-digital conversion,Energy consumption,Circuit topology,CMOS process,Gain
Transmitter,Baseband,Low-noise amplifier,Transceiver,Frequency divider,Computer science,Noise figure,Electronic engineering,CMOS,Electrical engineering,Amplifier
Journal
Volume
Issue
ISSN
44
8
0018-9200
Citations 
PageRank 
References 
34
5.42
13
Authors
6
Name
Order
Citations
PageRank
Alexander Tomkins17511.05
Ricardo Andres Aroca24810.32
Takuji Yamamoto310022.09
Sean T. Nicolson410317.97
Yoshiyasu Doi511517.56
Sorin P. Voinigescu622153.57