Title
Fixed-outline thermal-aware 3D floorplanning
Abstract
In this paper, we present a novel algorithm for 3D floorplanning with fixed outline constraints and a particular emphasis on thermal awareness. A computationally efficient thermal model that can be used to guide the thermal-aware floorplanning algorithm to reduce the peak temperature is proposed. We also present a novel white space redistribution algorithm to dissipate hotspot. Thermal through-silicon via (TSV) insertion is performed during the floorplanning process as a means to control the peak temperature. Experimental results are very promising and demonstrate that the proposed floorplanning algorithm has a high success rate at meeting the fixed-outline constraints while effectively limiting the rise in peak temperature.
Year
DOI
Venue
2010
10.1109/ASPDAC.2010.5419822
ASP-DAC
Keywords
Field
DocType
thermal awareness,novel algorithm,integrated circuit interconnections,proposed floorplanning algorithm,thermal through-silicon via insertion,three-dimensional integrated circuits,white space redistribution,computationally efficient thermal model,peak temperature,3d integrated circuits,novel white space redistribution,thermal through-silicon,fixed-outline thermal-aware,floorplanning process,thermal-aware floorplanning algorithm,integrated circuit layout,thermal-aware 3d floorplanning,resistance,interpolation,computational modeling,through silicon via,soc,heating,image recognition
Integrated circuit layout,Thermal model,White spaces,Thermal,Computer science,Interpolation,Car navigation systems,Electronic engineering,Limiting,Floorplan
Conference
ISSN
ISBN
Citations 
2153-6961
978-1-4244-5767-0
15
PageRank 
References 
Authors
0.70
8
4
Name
Order
Citations
PageRank
Linfu Xiao11576.83
Subarna Sinha219820.80
Jingyu Xu3858.33
Evangeline F. Y. Young499583.54