Name
Abstract | ||
|---|---|---|
We propose a novel capacitorless twin-transistor random access memory (TTRAM). The 2Mb test device has been fabricated on 130nm SOI-CMOS process. We demonstrate the TTRAM cell has two data-storage states and confirm the data retention time of 100ms at 80°C. TTRAM process is compatible with the conventional SOI-CMOS and never requires any additional processes. A 6.1ns row-access time is achieved and 250MHz operation can be realized by using 2bank 8b-burst mode. |
Year | DOI | Venue |
|---|---|---|
2007 | 10.1093/ietele/e90-c.4.765 | IEICE Transactions |
Keywords | Field | DocType |
data storage,silicon on insulator,retention time | Sense amplifier,Semiconductor memory,Computer science,Non-volatile random-access memory,Electronic engineering,Non-volatile memory,Nano-RAM,Computer memory,Random access,Memory refresh | Journal |
Volume | Issue | ISSN |
90-C | 4 | 1745-1353 |
Citations | PageRank | References |
1 | 0.43 | 1 |
Authors | ||
9 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Fukashi Morishita | 1 | 9 | 3.84 |
| H. Noda | 2 | 104 | 25.62 |
| Isamu Hayashi | 3 | 36 | 4.71 |
| Takayuki Gyohten | 4 | 20 | 3.94 |
| Mako Okamoto | 5 | 3 | 0.88 |
| Takashi Ipposhi | 6 | 13 | 5.97 |
| Shigeto Maegawa | 7 | 4 | 1.70 |
| Katsumi Dosaka | 8 | 77 | 15.22 |
| Kazutami Arimoto | 9 | 95 | 29.82 |