Title
A Dual-Layer Method for Transient and Permanent Error Co-Management in NoC Links
Abstract
We propose an error control method to comanage transient and permanent errors in the data link and physical layers of a network-on-chip (NoC). To reduce energy overhead, a configurable error control coding (ECC) unit adapts the number of redundant wires to the noise conditions, achieving a required error detection capability. Infrequently used redundant wires are utilized as spare wires to replace permanently unusable links. Furthermore, we propose a packet reorganization algorithm that cooperates with a shortened ECC method to support low-latency split transmission. Simulations show that the proposed method reduces packet latency and energy per useful packet by up to 50% and 70%, respectively, compared with previous methods.
Year
DOI
Venue
2011
10.1109/TCSII.2010.2092817
IEEE Transactions on Circuits and Systems Ii-express Briefs
Keywords
Field
DocType
noc links,permanent error,on-chip interconnect,physical layers,network-on-chip (noc),error detection capability,data link,configurable error control coding,error correction codes,error control coding (ecc),energy overhead reduction,transient error co-management,spare wires,spare wire,redundant wires,fault-tolerant routing,reliability,dual-layer method,packet reorganization algorithm,network-on-chip,permanent error co-management,low-latency split transmission,transient error,error correction,fault tolerance,chip,fault tolerant,error correction code,fault tolerant system,network on chip
Error control coding,Spare part,Latency (engineering),Network packet,Network on a chip,Electronic engineering,Error detection and correction,Fault tolerance,Mathematics,Data link,Embedded system
Journal
Volume
Issue
ISSN
58
1
1549-7747
Citations 
PageRank 
References 
6
0.44
12
Authors
2
Name
Order
Citations
PageRank
Qiaoyan Yu117428.58
Paul Ampadu228528.55