Paper Info
Title
NVSim: A Circuit-Level Performance, Energy, and Area Model for Emerging Nonvolatile Memory
Abstract
Various new nonvolatile memory (NVM) technologies have emerged recently. Among all the investigated new NVM candidate technologies, spin-torque-transfer memory (STT-RAM, or MRAM), phase-change random-access memory (PCRAM), and resistive random-access memory (ReRAM) are regarded as the most promising candidates. As the ultimate goal of this NVM research is to deploy them into multiple levels in the memory hierarchy, it is necessary to explore the wide NVM design space and find the proper implementation at different memory hierarchy levels from highly latency-optimized caches to highly density-optimized secondary storage. While abundant tools are available as SRAM/DRAM design assistants, similar tools for NVM designs are currently missing. Thus, in this paper, we develop NVSim, a circuit-level model for NVM performance, energy, and area estimation, which supports various NVM technologies, including STT-RAM, PCRAM, ReRAM, and legacy NAND Flash. NVSim is successfully validated against industrial NVM prototypes, and it is expected to help boost architecture-level NVM-related studies.
Year
DOI
Venue
2012
10.1109/TCAD.2012.2185930
IEEE Trans. on CAD of Integrated Circuits and Systems
Keywords
DocType
Volume
Nonvolatile memory,Arrays,Phase change random access memory,Wires,Distributed databases,Integrated circuit modeling
Journal
31
Issue
ISSN
Citations 
7
0278-0070
327
PageRank 
References 
Authors
10.86
14
4
Search Limit
100327
Name
Order
Citations
PageRank
Xiangyu Dong1136769.48
Cong Xu2115448.25
Yuan Xie36430407.00
Norman P. Jouppi46042791.53