Name
Abstract | ||
|---|---|---|
The compensation of scale factor imposes significant computationoverhead on the CORDIC algorithm. In this paper we present twoalgorithms and the corresponding architectures (one for both rotationand vectoring modes and the other only for rotation mode) toperform the scaling factor compensation in parallel with theclassical CORDIC iterations. With these methods, the scale factorcompensation overhead is reduced to a couple of iterations forany word length. The architectures presented have beenoptimized for conventional and redundant arithmetic. |
Year | DOI | Venue |
|---|---|---|
1998 | 10.1023/A:1008013707124 | VLSI Signal Processing |
Keywords | Field | DocType |
Computer Architecture,Rotation Mode,Pipeline Architecture,CORDIC Algorithm,CORDIC Iteration | Scale factor,Computer science,Parallel computing,Theoretical computer science,CORDIC,Computation | Journal |
Volume | Issue | ISSN |
19 | 3 | 0922-5773 |
Citations | PageRank | References |
13 | 0.90 | 12 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Julio Villalba | 1 | 219 | 23.56 |
| Tomás Lang | 2 | 417 | 73.70 |
| E. L. Zapata | 3 | 391 | 38.94 |