Name
Abstract | ||
|---|---|---|
Current FPGAs are heterogeneous partially reconfig- urable architectures, consisting of several resource types, e. g., logic cells and embedded memory. By us- ing partial reconfiguration, arbitrary hardware tasks can be placed and removed at run-time, causing the free FPGA resources to become fragmented over time. This fragmentation can prevent a requested task from being placed, if the required FPGA resources are not available in a sufficiently large contiguous region. A solution to this problem is to relocate the currently placed tasks for being able to place the requested task. This paper intro- duces a run-time defragmentation algorithm, which re- locates currently placed tasks on a heterogeneous FPGA area. Additionally, the necessary hardware mechanism for relocating a task at run-time are described. Simula- tion results for dynamically reconfiguring Xilinx Virtex- II FPGAs are presented, which show the improvement of the placement when using the proposed defragmentation algorithm. |
Year | Venue | Field |
|---|---|---|
2006 | ERSA | Relocation,Computer science,Defragmentation,Field-programmable gate array,Fragmentation (computing),Control reconfiguration,Embedded memory,Reconfigurable computing,Embedded system |
DocType | Citations | PageRank |
Conference | 4 | 0.55 |
References | Authors | |
10 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Markus Koester | 1 | 66 | 7.39 |
| Heiko Kalte | 2 | 191 | 17.04 |
| Mario Porrmann | 3 | 420 | 50.91 |