Paper Info
Title
A Low Hardware Overhead Self-Diagnosis Technique Using Reed-Solomon Codes for Self-Repairing Chips
Abstract
A self-diagnosis circuit that can be used for built-in self-repair is proposed. The circuit under diagnosis is assumed to be composed of a large number of field repairable units (FRUs), which can be replaced with spares when they are found to be defective. Since the proposed self-diagnosis circuit is implemented on the chip, responses that are scanned out of scan chains are compressed by the group compactor, the space compression circuit, and finally, the time compression circuit to reduce the volume of test response data. Both the space and time compression circuits implement a Reed-Solomon code. Unlike prior work, in the proposed technique, responses of all FRUs are observed at the same time to reduce diagnosis time. The proposed diagnosis circuit can locate up to l defective FRUs. We propose a novel space compression circuit that reduces hardware overhead by exploiting the frequency difference of the scan shift clock and the system clock and by combining scan cells into groups of size r. When the size of constituent multiple-input signature register (MISR) is m, the total number of signatures to be stored for the fault-free signature is 2lmB bits, where 1\le B \le m. The experimental results show that the proposed diagnosis circuit that can locate up to four defective FRUs in the same test session can be implemented with less than one percent of hardware overhead for a large industrial design. Hardware overhead for the diagnosis circuit is lower for large CUDs.
Year
DOI
Venue
2010
10.1109/TC.2009.182
IEEE Trans. Computers
Keywords
Field
DocType
hardware overhead,self-diagnosis circuit,diagnosis circuit,self-repairing chips,proposed diagnosis circuit,reed-solomon codes,novel space compression circuit,time compression circuit,proposed self-diagnosis circuit,low hardware overhead self-diagnosis,proposed technique,space compression circuit,diagnosis time,system clock,data mining,cmos integrated circuits,cmos technology,industrial design,reed solomon code,data compression,chip,hardware,forward error correction,maintenance engineering
Forward error correction,Computer science,Reed–Solomon error correction,Real-time computing,System time,Computer hardware,Built-in self-test,Parallel computing,CMOS,Chip,Electronic circuit,Data compression,Embedded system
Journal
Volume
Issue
ISSN
59
10
0018-9340
Citations 
PageRank 
References 
5
0.58
14
Authors
2
Name
Order
Citations
PageRank
Xiangyu Tang1272.90
Seongmoon Wang260548.50