Title
Profiling I/O Interrupts in Modern Architectures
Abstract
As applications grow increasingly communication-oriented, interrupt performance quickly becomes a crucial component of high performance I/O system design. At the same time, accurately measuring interrupt handler performance is difficult with the traditional simulation, instrumentation, or statistical sampling approaches. One of the most important components of interrupt performance is cache behavior. This paper presents a portable method for measuring the cache effects of I/O interrupt handling using hardware performance counters. The method is demonstrated on two commercial platforms with different architectures, the SGI Origin 200 and the Sun Ultra-1. This case study uses the methodology to measure the overhead of the two most common forms of interrupts: disk and network interrupts. It-demonstrates that the method works well and is reasonably robust. In addition, the results show that network interrupts have larger cache footprints than disk interrupts, and be-have very differently on both platforms, due to significant differences in OS organization.
Year
DOI
Venue
2000
10.1109/MASCOT.2000.876436
MASCOTS
Keywords
Field
DocType
cache effect,cache behavior,interrupt handler performance,o interrupt handling,modern architectures,o interrupts,larger cache footprint,disk interrupts,high performance,hardware performance counter,interrupt performance,network interrupts,sun,simulation,application software,cache,stress testing,sampling methods,operating system,system design,interrupts,virtual machines,hardware,operating systems
Interrupt,Interrupts in 65xx processors,Interrupt latency,Interrupt handler,Computer science,Cache,Real-time computing,Interrupt priority level,Advanced Programmable Interrupt Controller,Operating system,Programmable Interrupt Controller,Embedded system
Conference
ISBN
Citations 
PageRank 
0-7695-0728-X
3
0.43
References 
Authors
18
3
Name
Order
Citations
PageRank
Lambert Schaelicke127920.23
Al Davis298654.47
Sally A. Mckee31928152.59