Abstract | ||
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In this work, a numerical method for the evaluation of the topological properties of integrated CMOS charge pumps is presented. The analysis is based on a matrix description of the charge pump, which is used to define the network during the different operating phases. The proposed method allows the contribution of the non idealities of the structure (in particular, the parasitic elements) to be accurately taken into account. This way, a complete description of the charge pump behavior can be obtained. Furthermore, since the voltage at any internal node of the structure can be evaluated, the overall power efficiency can also be calculated, thus allowing a comparison between different topologies. The proposed formulation has been automated by computer implementation and easily adapted to analyze several charge pump structures with different number of capacitors and switches. A comparison with circuit simulator results confirms the effectiveness of the proposed method. |
Year | DOI | Venue |
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2006 | 10.1109/ISCAS.2006.1693287 | 2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS |
Keywords | Field | DocType |
switches,computational modeling,network topology,voltage,matrices,circuit topology,numerical analysis,integrated circuit design,power efficiency,cmos integrated circuits,charge pump,numerical method,capacitors | Electrical efficiency,Capacitor,Computer science,Voltage,Network topology,CMOS,Electronic engineering,Integrated circuit design,Charge pump,Electronic circuit simulation | Conference |
ISSN | Citations | PageRank |
0271-4302 | 3 | 0.62 |
References | Authors | |
1 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
L. Gobbi | 1 | 4 | 1.40 |
Alessandro Cabrini | 2 | 108 | 24.11 |
Guido Torelli | 3 | 240 | 64.39 |