Title
Reliability assessment of multi-via Cu-damascene structures by wafer-level isothermal electromigration tests
Abstract
In this paper, the isothermal wafer-level electromigration test method has been used to compare the resistance to electromigration damage of multi-level structures, realized by dual-damascene copper technology with a variable number of vias. “Upstream” and “downstream” structures have been defined, depending on the metal level where the line under test was located, with respect to the metal level where current and voltage taps were drawn. Not unexpectedly, the most critical current path for electromigration has been found in downstream structures, where the electron flow is entering the line under test. Worthy of note, a well defined dependence of the time to failure on the number of vias has been observed for these structures. Activation energy and current-density acceleration coefficient have been extracted and a quantitative relation is proposed to relate the lifetime expectancy to the number of vias.
Year
DOI
Venue
2007
10.1016/j.microrel.2007.07.002
Microelectronics Reliability
Keywords
Field
DocType
current density,test methods,electromigration,activation energy,copper
Current density,Test method,Wafer,Isothermal process,Voltage,Electronic engineering,Copper interconnect,Mechanics,Engineering,Electromigration,Electrical engineering,Chemical-mechanical planarization
Journal
Volume
Issue
ISSN
47
9
0026-2714
Citations 
PageRank 
References 
0
0.34
1
Authors
5
Name
Order
Citations
PageRank
A. Marras100.34
M. Impronta200.34
I. De Munari321.43
M.G. Valentini400.34
Andrea Scorzoni533.26