Title | ||
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On the Transformation of Manufacturing Test Sets into On-Line Test Sets for Microprocessors |
Abstract | ||
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In software-based self-test (SBST) a microprocessor executes a set of test programs devised for detecting the highest possible percentage of faults. The main advantages of this approach are its high defect fault coverage (being performed at-speed) and the reduced cost (since it does not require any change in the processor hardware). SBST can also be used for on-line test of a microprocessor-based system. However, some additional constraints exist in this case (e.g. in terms of test length and duration, as well as intrusiveness). This paper faces the issue of automatically transforming a test set devised for manufacturing test in a test set suitable for on-line test. Experimental results are reported on an Intel 8051 microcontroller. |
Year | DOI | Venue |
---|---|---|
2005 | 10.1109/DFTVS.2005.53 | DFT |
Keywords | Field | DocType |
high defect fault coverage,highest possible percentage,test program,test length,main advantage,manufacturing test sets,processor hardware,additional constraint,on-line test sets,on-line test,microprocessor-based system,fault coverage | Test harness,System under test,Automatic test pattern generation,Fault coverage,Test Management Approach,Computer science,Automatic test equipment,Real-time computing,Test compression,Computer engineering,Test set,Embedded system | Conference |
ISSN | ISBN | Citations |
1550-5774 | 0-7695-2464-8 | 14 |
PageRank | References | Authors |
0.77 | 9 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
E. Sanchez | 1 | 130 | 16.50 |
M. Sonza Reorda | 2 | 1099 | 114.76 |
G. Squillero | 3 | 330 | 30.36 |