Increasing pattern recognition accuracy for chemical sensing by evolutionary based drift compensation | 5 | 0.63 | 2011 |
Automatic Generation of Software-based Functional Failing Test for Speed Debug and On-silicon Timing Verification | 3 | 0.44 | 2011 |
Design validation of multithreaded architectures using concurrent threads evolution | 2 | 0.39 | 2009 |
An Effective Technique for the Automatic Generation of Diagnosis-Oriented Programs for Processor Cores | 16 | 0.78 | 2008 |
An evolutionary methodology for test generation for peripheral cores via dynamic FSM extraction | 4 | 0.56 | 2008 |
Interactive presentation: An enhanced technique for the automatic generation of effective diagnosis-oriented test programs for processor | 2 | 0.38 | 2007 |
On Automatic Test Block Generation for Peripheral Testing in SoCs via Dynamic FSMs Extraction | 0 | 0.34 | 2007 |
An Effective Technique for Minimizing the Cost of Processor Software-Based Diagnosis in SoCs | 20 | 0.94 | 2006 |
New evolutionary techniques for test-program generation for complex microprocessor cores | 3 | 0.47 | 2005 |
Evolving assembly programs: how games help microprocessor validation | 21 | 1.31 | 2005 |
On the Transformation of Manufacturing Test Sets into On-Line Test Sets for Microprocessors | 14 | 0.77 | 2005 |
Automatic generation of test sets for SBST of microprocessor IP cores | 2 | 0.40 | 2005 |
Diagnosing Faulty Functional Units in Processors by Using Automatically Generated Test Sets | 1 | 0.40 | 2005 |
Code Generation for Functional Validation of Pipelined Microprocessors | 9 | 1.04 | 2004 |
Automatic test programs generation driven by internal performance counters | 9 | 0.78 | 2004 |
Coupling different methodologies to validate obsolete microprocessors | 0 | 0.34 | 2004 |
Fully Automatic Test Program Generation for Microprocessor Cores | 54 | 3.41 | 2003 |
An enhanced framework for microprocessor test-program generation | 7 | 1.25 | 2003 |
Automatic test program generation for pipelined processors | 9 | 1.03 | 2003 |
Initializability analysis of synchronous sequential circuits | 2 | 0.38 | 2002 |
Evolutionary test program induction for microprocessor design verification | 12 | 1.43 | 2002 |
An evolutionary algorithm for reducing integrated-circuit test application time | 1 | 0.37 | 2002 |
New Techniques for Speeding-Up Fault-Injection Campaigns | 37 | 2.46 | 2002 |
Evolving effective CA/CSTP: BIST architectures for sequential circuits | 3 | 0.43 | 2001 |
On the test of microprocessor IP cores | 47 | 4.35 | 2001 |
An RT-level fault model with high gate level correlation | 12 | 0.82 | 2000 |
Automatic test bench generation for validation of RT-level descriptions: an industrial experience | 26 | 2.36 | 2000 |
An improved cellular automata-based BIST architecture for sequential circuits | 1 | 0.36 | 2000 |
Exploiting the selfish gene algorithm for evolving cellular automata | 6 | 1.04 | 2000 |
Approximate equivalence verification of sequential circuits via genetic algorithms | 2 | 0.41 | 1999 |
A Genetic Algorithm for the Computation of Initialization Sequences for Synchronous Sequential Circuits | 0 | 0.34 | 1997 |