Abstract | ||
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The design of a highly configurable continuous flow mixed-radix (CFMR) Fast Fourier Transform (FFT) processor is presented. It computes fixed-point complex FFTs and inverse FFTs (IFFTs), and utilizes a flexible addressing scheme to enable runtime configuration of the FFT length from 16-points to 4096-points. A configurable block floating point (BFP) unit increases numerical performance. Compared to a floating point Matlab FFT function, the accuracy of the proposed architecture is 80 dB for a 64-point FFT and 74 dB for a 1024-point FFT with random complex input data. |
Year | DOI | Venue |
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2009 | 10.1109/ISCAS.2009.5117960 | ISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-5 |
Keywords | Field | DocType |
floating point,indexes,throughput,radiation detectors,ofdm,computer architecture,signal processing,read only memory,ofdm modulation,fast fourier transform,fast fourier transforms,fixed point | Signal processing,Split-radix FFT algorithm,Prime-factor FFT algorithm,Floating point,Computer science,Parallel computing,Block floating-point,Fast Fourier transform,Orthogonal frequency-division multiplexing,Mixed radix | Conference |
Citations | PageRank | References |
17 | 1.16 | 9 |
Authors | ||
3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Anthony T. Jacobson | 1 | 17 | 1.16 |
Dean Nguyen Truong | 2 | 33 | 2.24 |
Bevan M. Baas | 3 | 295 | 27.78 |