Name
Abstract | ||
|---|---|---|
We present a simulator which determines the coverage of small-delay faults, i.e., delay faults with a size below one clock cycle, caused by resistive-open defects. These defects are likely to escape detection by stuck-at or transition fault patterns. For the first time, we couple the calculation of the critical size of a small-delay fault with the computation of the resistance range of the corresponding resistive-open defect for which this size is exceeded. By doing so, we are able to extend probabilistic fault coverage metrics initially developed for static resistive bridging faults to small-delay defects. |
Year | DOI | Venue |
|---|---|---|
2008 | 10.1109/ETS.2008.19 | European Test Symposium |
Keywords | Field | DocType |
corresponding resistive-open defect,probabilistic fault coverage metrics,resistive-open defect,delay fault,static resistive,small-delay fault,resistive-open defects,transition fault pattern,critical size,resistance range,clock cycle,resistance,fault detection,fault coverage,computational modeling,logic gates | Logic gate,Fault coverage,Resistive touchscreen,Fault detection and isolation,Simulation,Computer science,Bridging (networking),Real-time computing,Electronic engineering,Probabilistic logic,Cycles per instruction,Fault indicator | Conference |
ISSN | ISBN | Citations |
1530-1877 | 978-0-7695-3150-2 | 29 |
PageRank | References | Authors |
1.07 | 11 | 7 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Alejandro Czutro | 1 | 71 | 3.03 |
| Nicolas Houarche | 2 | 29 | 1.07 |
| Piet Engelke | 3 | 296 | 16.11 |
| Ilia Polian | 4 | 889 | 78.66 |
| Mariane Comte | 5 | 61 | 7.44 |
| Michel Renovell | 6 | 749 | 96.46 |
| Bernd Becker | 7 | 30 | 1.44 |