Title
Total Energy Minimization of Real-Time Tasks in an On-Chip Multiprocessor Using Dynamic Voltage Scaling Efficiency Metric
Abstract
This paper proposes an algorithm that provides both dynamic voltage scaling and power shutdown to minimize the total energy consumption of an application executed on an on-chip multiprocessor. The proposed algorithm provides an extended schedule and stretch method, where task computations are iteratively stretched within the slack of a time-constrained dependent task set. In addition, the break-even threshold interval for amortizing the shutdown overhead is considered. By evaluating each set of stretched task computations, an energy-efficient set is obtained. The proposed dynamic voltage scaling efficiency metric is the ratio of the reduced energy to the increased cycle time when the supply voltage is scaled, which can be used to determine the task computation cycle to be stretched. Experimental results show that the proposed algorithm outperforms the traditional schedule and stretch method in the various evaluations of target real applications.
Year
DOI
Venue
2008
10.1109/TCAD.2008.2006094
IEEE Trans. on CAD of Integrated Circuits and Systems
Keywords
DocType
Volume
dynamic voltage scaling efficiency,processor scheduling,power management,power aware computing,energy-aware systems,task computation cycle,total energy minimization,dynamic voltage scaling efficiency metric,dynamic voltage scaling,proposed dynamic voltage,load balancing and task assignment,power shutdown,multiprocessing systems,on-chip multiprocessor,time-constrained dependent task set,task computation,proposed algorithm,energy-efficient set,stretch method,supply voltage,real-time tasks,stretched task computation,Dynamic voltage scaling (DVS),minimisation
Journal
27
Issue
ISSN
Citations 
11
0278-0070
11
PageRank 
References 
Authors
0.56
15
5
Name
Order
Citations
PageRank
Hyunjin Kim1424.84
Hyejeong Hong2325.16
Hong-Sik Kim3839.69
Jinho Ahn48327.05
Sungho Kang543678.44