Name
Title | ||
|---|---|---|
A digitally stabilized type-III PLL using ring VCO with 1.01psrms integrated jitter in 65nm CMOS. |
Year | Venue | DocType |
|---|---|---|
2012 | ISSCC | Conference |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Akihide Sai | 1 | 20 | 8.25 |
| Yuka Kobayashi | 2 | 12 | 2.38 |
| Shigehito Saigusa | 3 | 19 | 5.35 |
| Osamu Watanabe | 4 | 960 | 104.55 |
| Tetsuro Itakura | 5 | 187 | 33.44 |