Name
Abstract | ||
|---|---|---|
Power has become the most important candidate for optimization in today's design. This is necessary for further functionality and processing capability to be added to the design. Standard cell design is the defacto standard for most IC designs. The other end of the spectrum is full custom design whose efficiency is very high, but with a large design time. In this paper we investigate the use of prototype module generators to improve the energy efficiency of the design over the standard cell design while trading off some design time. We investigate this on an interconnect intensive design namely the SIMD Shuffler which is one of the important parts of a low power embedded processor's datapath. We show that using module generators, we can reduce the energy consumption of the shuffler by about 30%. We also show the possible research opportunities for filling in the further EDA tools for low power. |
Year | DOI | Venue |
|---|---|---|
2007 | 10.1007/978-3-540-74442-9_42 | PATMOS |
Keywords | Field | DocType |
defacto standard,large design time,intensive design,low power,simd shuffler,standard cell design,energy consumption,full custom design,semi custom design,design time,ic design,case study,energy efficiency,process capability,spectrum,embedded processor,energy efficient | De facto standard,Datapath,Computer science,Efficient energy use,SIMD,Full custom,Electronic design automation,Standard cell,Computer hardware,Energy consumption,Embedded system | Conference |
Volume | ISSN | ISBN |
4644 | 0302-9743 | 3-540-74441-X |
Citations | PageRank | References |
0 | 0.34 | 10 |
Authors | ||
8 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Praveen Raghavan | 1 | 308 | 47.48 |
| Nandhavel Sethubalasubramanian | 2 | 0 | 0.34 |
| Satyakiran Munaga | 3 | 17 | 2.47 |
| Estela Rey Ramos | 4 | 9 | 1.25 |
| Murali Jayapala | 5 | 191 | 18.48 |
| Oliver Weiss | 6 | 1 | 0.70 |
| Francky Catthoor | 7 | 3932 | 423.30 |
| Diederik Verkest | 8 | 1544 | 123.76 |