Name
Abstract | ||
|---|---|---|
In platform based SoC design, the computational part and communication part of the system are required to be orthogonalized. In this paper, we propose the fully orthogonalized communication architecture of multi-processor SoC (MP-SoC) which has a global bus architecture. In order to orthognalize communication and computation, we use the central arbiter which not only performs arbitration of transactions, but generates of transaction information. Each master has a transactor which translate the information from the central arbiter, so that the master doesn't need to synchronize with other processors. This paper also provides the transaction level modeling (TLM) methodology at timed functional (TF) level with SystemC 2.0.1 and master-slave library. |
Year | DOI | Venue |
|---|---|---|
2005 | 10.1109/IWSOC.2005.89 | IWSOC |
Keywords | Field | DocType |
master-slave library,orthogonalized communication architecture,timed functional level,soc design,computational part,global bus,communication part,transaction level modeling,system-on-chip,system buses,multiprocessing systems,multi-processor soc,integrated circuit design,multiprocessor soc,systemc 2.0.1,system-on-chip design,global bus architecture,central arbiter,transaction information,system on chip,master slave,system performance,computer architecture,registers,system level design | Synchronization,Arbiter,Computer architecture,System on a chip,Computer science,Electronic system-level design and verification,Transaction-level modeling,SystemC,Database transaction,Master/slave,Embedded system | Conference |
ISBN | Citations | PageRank |
0-7695-2403-6 | 1 | 0.37 |
References | Authors | |
4 | 2 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jin Lee | 1 | 1 | 0.37 |
| Sin-Chong Park | 2 | 80 | 22.58 |