Name
Title | ||
|---|---|---|
Synthesis of topology configurations and deadlock free routing algorithms for ReNoC-based systems-on-chip |
Abstract | ||
|---|---|---|
In the near future, generic System-on-Chip (SoC) platforms will be replacing custom designed SoCs. Such generic platforms require a highly flexible interconnect in order to support a wide variety of applications. The ReNoC architecture provides this by allowing power efficient, application specific topologies to be configured on top of a fixed but reconfigurable physical architecture through a mixture of packet switching and physical circuit switching. The first contribution of this paper is three novel algorithms that, given an abstract description of the application and the physical architecture, 1) synthesize the application specific topologies, 2) map them onto the physical architecture, and 3) create deadlock free, application specific routing algorithms. The second contribution is a novel physical architecture based on an extended mesh of ReNoC nodes. We apply our algorithms to a mixture of real and synthetic applications and three different physical architectures. Our results show that the different algorithms' performance are highly dependent on the physical architecture. On average, our novel physical architecture reduces power consumption by 58% compared to a conventional Network-on-Chip. |
Year | DOI | Venue |
|---|---|---|
2009 | 10.1145/1629435.1629500 | CODES+ISSS |
Keywords | Field | DocType |
physical circuit switching,renoc-based systems-on-chip,application specific topology,synthetic application,reconfigurable physical architecture,deadlock free routing algorithm,different physical architecture,application specific routing algorithm,physical architecture,topology configuration,novel physical architecture,renoc architecture,novel algorithm,power efficiency,network on chip,system on chip,routing,circuit switched,configuration | Architecture,System on a chip,Circuit switching,Computer science,Network on a chip,Real-time computing,Network topology,Packet switching,Interconnection,Routing algorithm,Distributed computing | Conference |
Citations | PageRank | References |
4 | 0.42 | 17 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Matthias Bo Stuart | 1 | 13 | 1.33 |
| Mikkel Bystrup Stensgaard | 2 | 87 | 3.53 |
| Jens Sparsø | 3 | 453 | 52.97 |