Title
A Memetic Approach for Nanoscale Hybrid Circuit Cell Mapping
Abstract
This paper considers a cell mapping task of CMOL, a hybrid CMOS/molecular circuit architecture. To tackle the combinatorial hurdle arising from the structural connectivity domain constraint, a memetic computing algorithm is developed. The framework takes advantage of simulated annealing based local search strategy and appropriate population based encoding manipulation. Numerical results from ISCAS benchmarks and comparison with pure genetic approach illustrate the effectiveness of the modeling and solution methodology. In terms of CPU runtime, timing delay and circuit scale, the proposed method has better performance than previous methods.
Year
DOI
Venue
2010
10.1109/DSD.2010.22
DSD
Keywords
Field
DocType
molecular circuit architecture,circuit scale,memetic computing algorithm,cell mapping task,nanotechnology,population based encoding manipulation,encoding manipulation,memetic approach,nanoscale hybrid circuit cell,mapping,cmol,circuit optimisation,memetic,nanoscale hybrid circuit,hybrid cmos,better performance,optimization,timing delay,appropriate population,nanoscale hybrid circuit cell mapping,local search strategy,combinatorial hurdle,simulated annealing,cmos/molecular circuit architecture,cpu runtime,iscas benchmarks,structural connectivity domain constraint,genetics,local search,cmos integrated circuits,nanowires,computer architecture,logic gates
Simulated annealing,Population,Logic gate,Nanoscopic scale,Cell mapping,Computer science,Parallel computing,Real-time computing,CMOS,Local search (optimization),Encoding (memory)
Conference
ISBN
Citations 
PageRank 
978-1-4244-7839-2
5
0.67
References 
Authors
6
5
Name
Order
Citations
PageRank
Zhufei Chu1136.33
Yinshui Xia23116.46
William N. N. Hung330434.98
Lun-Yao Wang4207.39
Xiaoyu Song547151.61