Title
Provably correct high-level timing analysis without path sensitization
Abstract
This paper addresses the problem of true delay estimation during high level design. The existing delay estimation techniques either estimate the topological delay of the circuit which may be pessimistic, or use gate-level timing analysis for calculating the true delay, which may be prohibitively expensive.We show that the paths in the implementation of a behavioral specification can be partitioned into two sets, SP and UP. While the paths in SP can affect the delay of the circuit, the paths in UP cannot. Consequently, the true delay of the resulting circuit can be computed by just measuring the topological delay of the paths in SP, eliminating the need for the computationally intensive process of path sensitization. Experimental results show that high-level true delay estimation can be done very fast, even when gate-level true delay estimation becomes computationally infeasible. The high-level delay estimates are verified by comparing with delay estimates obtained by gate-level timing analysis on the actual implementation.
Year
DOI
Venue
1994
10.1109/ICCAD.1994.629905
ICCAD
Keywords
Field
DocType
high-level delay estimate,true delay estimation,path sensitization,topological delay,resulting circuit,gate-level true delay estimation,existing delay estimation technique,true delay,actual implementation,gate-level timing analysis,provably correct high-level timing,high-level true delay estimation,circuit analysis,process design,computer science,high level synthesis,arithmetic function,national electric code,timing analysis,resource sharing
Delay calculation,Permission,High-level design,Computer science,Electronic engineering,Real-time computing,Process design,Static timing analysis,Network analysis,Elmore delay,National Electrical Code
Conference
ISSN
ISBN
Citations 
1063-6757
0-89791-690-5
10
PageRank 
References 
Authors
1.40
12
3
Name
Order
Citations
PageRank
Subhrajit Bhattacharya146236.93
Sujit Dey23067278.74
Franc Brglez352580.13