Title
FARM: A Prototyping Environment for Tightly-Coupled, Heterogeneous Architectures
Abstract
Computer architectures are increasingly turning to parallelism and heterogeneity as solutions for boosting performance in the face of power constraints. As this trend continues, the challenges of simulating and evaluating these architectures have grown. Hardware prototypes provide deeper insight into these systems when compared to simulators, but are traditionally more difficult and costly to build. We present the Flexible Architecture Research Machine (FARM), a hardware prototyping system based on an FPGA coherently connected to a multiprocessor system. FARM substantially reduces the difficulty and cost of building hardware prototypes by providing a ready-made framework for communicating with a custom design on the FPGA. FARM ensures efficient, low-latency communication with the FPGA via a variety of mechanisms, allowing a wide range of applications to effectively utilize the system. FARM’s coherent FPGA includes a cache and participates in coherence activities with the processors. This tight coupling allows for realistic, innovative architecture prototypes that would otherwise be extremely difficult to simulate. We evaluate FARM by providing the reader with a profile of the overheads introduced across the full range of communication mechanisms. This will guide the potential FARM user towards an optimal configuration when designing his prototype.
Year
DOI
Venue
2010
10.1109/FCCM.2010.41
FCCM
Keywords
Field
DocType
multiprocessor system,potential farm user,heterogeneous architectures,hardware prototype,coherent fpga,low-latency communication,flexible architecture research machine,full range,prototyping environment,wide range,coherence activity,communication mechanism,parallel processing,low latency,boosting,computational modeling,computer architecture,coprocessors,hypertransport,tight coupling,field programmable gate arrays,fpga,hardware,prototyping,logic design,prototypes
Logic synthesis,Architecture,Computer architecture,Cache,Computer science,Parallel computing,Field-programmable gate array,Multiprocessing,Coprocessor,HyperTransport,Virtual prototyping,Embedded system
Conference
ISBN
Citations 
PageRank 
978-1-4244-7143-0
8
0.66
References 
Authors
9
6
Name
Order
Citations
PageRank
Tayo Oguntebi136013.47
Sungpack Hong286433.20
Jared Casper382434.12
Nathan Bronson440817.79
Christos Kozyrakis55817355.99
Kunle Olukotun64532373.50