Title | ||
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Enhanced Defect Tolerance through Matrixed Deployment of Intelligent Sensors for the Smart Power Grid |
Abstract | ||
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We have recently proposed 3-D intelligent sensors for the power grid with a view toward helping improve its reliability and restoration capability. Our solution is to use a matrix of fault tolerant distributed sensors that can sense as well as take local actions. These new sensors are "3-D Heterogeneous Sensor System on a Chip (HSoC)", which can potentially overcome delays and domino effects. The paper1 specifically focuses on the application of the 3-D HSoCs for fault-distance estimation and the issues involved in the failure of such devices - due to defects both within the chip and due to external stress. We show that the use of multiple devices brings benefits relating to both the detection and accuracies of fault distance and arc voltage estimates. Specifically, if the nearest device is located at -x relative to the location of the transmission line fault, then the use of additional devices at -D-x, D-x, and 2D-x diminishes the probability of loss of detection considerably. The paper presents studies on this fault tolerance, as well as accuracy of estimation, vs. the number of devices used for collaborative detection. It is important to note that this collaboration does not require additional sensors, only communication among them. Matrixed HSoCs can provide several fold improvement over single HSoC. |
Year | DOI | Venue |
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2011 | 10.1109/DFT.2011.40 | Defect and Fault Tolerance in VLSI and Nanotechnology Systems |
Keywords | Field | DocType |
matrixed hsocs,3-d intelligent sensor,smart power grid,transmission line fault,intelligent sensors,collaborative detection,additional device,fault tolerant,matrixed deployment,3-d heterogeneous sensor system,fault distance,fault tolerance,3-d hsocs,enhanced defect tolerance,chip,power transmission lines,intelligent sensor,transmission line | Software deployment,Smart grid,Transmission line,Intelligent sensor,Computer science,Electronic engineering,Chip,Real-time computing,Domino,Electric power transmission,Fault tolerance | Conference |
ISSN | ISBN | Citations |
1550-5774 | 978-1-4577-1713-0 | 1 |
PageRank | References | Authors |
0.38 | 7 | 2 |
Name | Order | Citations | PageRank |
---|---|---|---|
Vijay K. Jain | 1 | 93 | 54.61 |
Glenn H. Chapman | 2 | 167 | 34.10 |