Name
Abstract | ||
|---|---|---|
To achieve a high-throughput decoder, massive-parallel computations are normally applied to the Chien search, but the parallel realization increases the hardware complexity significantly. To reduce the hardware complexity of the parallel Chien search, this brief proposes a 2-D optimization method. In contrast to the previous 1-D optimizations, the proposed method maximizes the sharing of common subexpressions in both the row and column directions. All the partial products needed in the parallel structure are represented in a single matrix, and the finite-field adders are completely eliminated in effect. Simulation results show that the proposed 2-D optimization leads to a significant reduction of the hardware complexity. For the (8191, 7684, 39) BCH code, the count of xor gates in the parallel Chien search is reduced by 92% and 22%, compared to the straightforward and strength-reduced structures, respectively. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/TCSII.2011.2158709 | IEEE Trans. on Circuits and Systems |
Keywords | Field | DocType |
optimisation,matrix multiplication,bose–chaudhuri–hochquenghem (bch) codes,parallel processing,bose-chaudhuri-hochquenghem code,low complexity,hardware complexity,bch codes,bch code,xor gate count,search problems,chien search,computational complexity,high-throughput decoder,two-dimensional optimization,2d optimization method,logic gates,decoding,low-complexity parallel chien search structure,hardware,computer architecture,adders,optimization,finite field,logic gate,high throughput | Chien search,Logic gate,Adder,Computer science,Parallel computing,XOR gate,Algorithm,BCH code,Decoding methods,Matrix multiplication,Computational complexity theory | Journal |
Volume | Issue | ISSN |
58 | 8 | 1549-7747 |
Citations | PageRank | References |
11 | 1.10 | 7 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Youngjoo Lee | 1 | 74 | 18.85 |
| Hoyoung Yoo | 2 | 75 | 9.99 |
| In-Cheol Park | 3 | 888 | 124.36 |