Name
Abstract | ||
|---|---|---|
The Nymble compiler system accepts C code, annotated by the user with partitioning directives, and translates the indicated parts into hardware accelerators for execution on FPGA-based reconfigurable computers. The interface logic between the remaining software parts and the accelerators is automatically created, taking into account details such as cache flushes and copying of FPGA-local memories to the shared main memory. The system also supports calls from hardware back into software, both for infrequent operations that do not merit hardware area, as well as for using operating system / library services such as memory management and I/O. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1109/ReCoSoC.2013.6581538 | 2013 8TH INTERNATIONAL WORKSHOP ON RECONFIGURABLE AND COMMUNICATION-CENTRIC SYSTEMS-ON-CHIP (RECOSOC) |
Keywords | Field | DocType |
computer architecture,cache flush,hardware accelerator,switches,field programmable gate arrays,microarchitecture,registers,operating system,memory management,hardware,kernel | Computer science,CPU cache,Cache,Real-time computing,Software,Memory management,Microarchitecture,Parallel computing,Field-programmable gate array,Compiler,Hardware acceleration,Operating system,Embedded system | Conference |
Citations | PageRank | References |
14 | 0.76 | 11 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jens Huthmann | 1 | 36 | 4.83 |
| Björn Liebig | 2 | 27 | 3.38 |
| Julian Oppermann | 3 | 30 | 6.88 |
| Andreas Koch | 4 | 94 | 15.13 |