Paper Info
Title
A 4-Gb/S/Pin Current Mode 4-Level Simultaneous Bidirectional I/O With Current Mismatch Calibration
Abstract
This paper describes a high speed current mode multi-level simultaneous bi-directional I/O which calibrates pin-to-pin current mismatch. Output impedance is controlled by an impedance matching circuit reducing process variation down to +/- 2.5%. Maximum 20% pin-to-pin current mismatch is reduced to 1.25% by 4-bit digital calibration scheme. Simulation results based on 0.18 mu m CMOS process show that the proposed design achieves 4-Gb/s/pin data rate with 512ps timing window and 27mV voltage window. I/O circuits consume 12mW/pin at a supply voltage of 1V.
Year
DOI
Venue
2006
10.1109/ISCAS.2006.1692758
2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS
Keywords
Field
DocType
bit error rate,process variation,voltage,4 bit,bandwidth,impedance matching,integrated circuit design,signal generators,calibration
Output impedance,4-bit,Computer science,Voltage,Impedance matching,Input/output,Electronic engineering,Integrated circuit design,Process variation,Electronic circuit,Electrical engineering
Conference
ISSN
Citations 
PageRank 
0271-4302
5
0.71
References 
Authors
4
3
Name
Order
Citations
PageRank
Yong Sin Kim1195.45
Sang-Ho Shin242041.46
Sung-Mo Steve Kang31198213.14