Paper Info
Title
PICA: Processor Idle Cycle Aggregation for Energy-Efficient Embedded Systems
Abstract
Processor Idle Cycle Aggregation (PICA) is a promising approach for low-power execution of processors, in which small memory stalls are aggregated to create large ones, enabling profitable switch of the processor into low-power mode. We extend the previous approach in three dimensions. First we develop static analysis for the PICA technique and present optimal parameters for five common types of loops based on steady-state analysis. Second, to remedy the weakness of software-only control in varying environment, we enhance PICA with minimal hardware extension that ensures correct execution for any loops and parameters, thus greatly facilitating exploration-based parameter tuning. Third, we demonstrate that our PICA technique can be applied to certain types of nested loops with variable bounds, thus enhancing the applicability of PICA. We validate our analytical model against simulation-based optimization and also show, through our experiments on embedded application benchmarks, that our technique can be applied to a wide range of loops with average 20% energy reductions, compared to executions without PICA.
Year
DOI
Venue
2012
10.1145/2220336.2220338
ACM Trans. Embedded Comput. Syst.
Keywords
Field
DocType
analytical model,low-power mode,processor idle cycle aggregation,low-power execution,promising approach,correct execution,previous approach,steady-state analysis,static analysis,pica technique,embedded systems
Computer science,Efficient energy use,Idle,Parallel computing,Static analysis,Embedded applications,Real-time computing,Code transformation,Nested loop join,Embedded system
Journal
Volume
Issue
ISSN
11
2
1539-9087
Citations 
PageRank 
References 
0
0.34
14
Authors
2
Name
Order
Citations
PageRank
Jongeun Lee142933.71
Aviral Shrivastava281268.67