Title
Translinear signal processing circuits in standard CMOS FPAA
Abstract
In this paper, the implementation of signal processing circuits on a novel translinear Field-Programmable Analog Array (FPAA) testchip is reported. The FPAA testchip is based on a 0.35-micron, fully CMOS translinear element, which is the core block of a reconfigurable analog cell. The FPAA embeds a 5 × 5 cell array. As implementation examples, a four-quadrant multiplier with five decade dynamic range and a programmable fourth-order low-pass filter with up to 7 MHz bandwidth have been mapped on the translinear FPAA. 14 cells have been used for the four-quadrant multiplier while 18 cells were needed for the fourth-order low-pass filter.
Year
DOI
Venue
2009
10.1109/ICECS.2009.5410791
Yasmine Hammamet
Keywords
Field
DocType
CMOS analogue integrated circuits,analogue multipliers,field programmable analogue arrays,low-pass filters,FPAA testchip,bandwidth 7 MHz,four-quadrant multiplier,fully CMOS translinear element,programmable fourth-order low-pass filter,reconflgurable analog cell,size 0.35 mum,translinear field-programmable analog array testchip,translinear signal processing circuits,Field Programmable Analog Array,Four-Quadrant Multiplier,Log-domain Filter,Mixed-signal,Translinear Cell
Dynamic range,Computer science,Multiplier (economics),Electronic engineering,Control engineering,CMOS,Bandwidth (signal processing),Field-programmable analog array,Signal processing circuits
Conference
ISBN
Citations 
PageRank 
978-1-4244-5091-6
0
0.34
References 
Authors
0
4
Name
Order
Citations
PageRank
Luís Martínez-Alvarado1111.42
Jordi Madrenas215027.87
Daniel Fernández351.63
Martinez-Alvarado, L.400.34