Title
A Tabular Method for Guard Strengthening, Symmetrization, and Operator Reduction for Martin's Asynchronous Design Methodology
Abstract
We introduce a tabular method to perform the last two of the four phases of Martin's compilation process for asynchronous circuit design. The method is then demonstrated with three examples, illustrating that our systematic method is very straightforward, flexible, and convenient to apply, and, hence, it lends itself to automatic compilation.
Year
DOI
Venue
1997
10.1109/12.620487
IEEE Trans. Computers
Keywords
Field
DocType
asynchronous design methodology,operator reduction,automatic compilation,asynchronous circuit design,tabular method,compilation process,systematic method,guard strengthening,sequential circuits,logic design,production,symmetrization,asynchronous circuit,design methodology
Logic synthesis,Asynchronous communication,Sequential logic,Bitwise operation,Computer science,Parallel computing,Symmetrization,Real-time computing,Design methods,Guard (information security),Asynchronous circuit
Journal
Volume
Issue
ISSN
46
9
0018-9340
Citations 
PageRank 
References 
0
0.34
11
Authors
3
Name
Order
Citations
PageRank
Nozar Tabrizi1294.11
Michael J. Liebelt25613.27
Kamran Eshraghian310127.54