Name
Title | ||
|---|---|---|
Design and evaluation of a media-oriented vector processor with a multi-banked cache memory |
Abstract | ||
|---|---|---|
Vector processors have significant advantages for next generation multimedia applications (MMAs). One of them is that vector processors can achieve a high data transfer performance and thus a high computing performance by using a high bandwidth memory sub-system. However, their high bandwidth memory sub-systems usually lead to enormous costs in terms of chip area, power consumption and energy consumption. These costs are too expensive for an embedded computer system, which is the main execution platform of MMAs. In order to enable an embedded computer system to exploit the high memory bandwidth and thus the high performance of the vector architecture, this paper proposes a media-oriented vector processor (MVP) with a multi-banked cache memory (MVP-cache). Different from conventional multi-banked cache memories, MVP-cache makes multiple independent data arrays of small size cache lines share one tag array. In this way, MVP-cache can consume less static power consumption on its tag arrays because of the reduction in the tag array size. MVP-cache can also achieve a high efficiency on short vector data transfers because the flexibility of data transfers can be improved by independently controlling the data transfers of each data array. Moreover, in order to fully exploit the bandwidth of MVP-cache, MVP also introduces an out-of-order vector processing mechanism. By using these mechanisms, MVP expands the potential of vector architectures on media processing in embedded computer systems. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1109/ESTIMedia.2013.6704506 | ESTIMedia |
Keywords | Field | DocType |
embedded computer system,mmas,multimedia computing,power aware computing,power consumption,media-oriented vector processor,memory subsystem,cache storage,multibanked cache memory,mvp-cache,multimedia applications,tag array size reduction,vector processor systems,data transfer performance,short vector data transfers,independent data arrays,media processing,energy consumption,vector architectures,out-of-order vector processing mechanism,embedded systems,high computing performance | CPU cache,Cache,Computer science,Real-time computing,Page cache,Cache coloring,Non-uniform memory access,Computer hardware,Cache pollution,Parallel computing,Computing with Memory,Cache algorithms,Embedded system | Conference |
ISSN | Citations | PageRank |
2325-1271 | 1 | 0.36 |
References | Authors | |
18 | 5 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Ye Gao | 1 | 1 | 2.05 |
| Naoki Shoji | 2 | 1 | 0.36 |
| Ryusuke Egawa | 3 | 109 | 28.68 |
| Hiroyuki Takizawa | 4 | 273 | 46.54 |
| Hiroaki Kobayashi | 5 | 108 | 14.52 |