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RYUSUKE EGAWA
Author Info
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Name
Affiliation
Papers
RYUSUKE EGAWA
Tohoku Univ, Cybersci Ctr, Res Div Supercomp Syst, Sendai, Miyagi 980, Japan
70
Collaborators
Citations
PageRank
107
109
28.68
Referers
Referees
References
231
813
396
Search Limit
100
813
Publications (70 rows)
Collaborators (100 rows)
Referers (100 rows)
Referees (100 rows)
Title
Citations
PageRank
Year
Portability of Vectorization-aware Performance Tuning Expertise across System Generations
0
0.34
2021
Opencl-Like Offloading With Metaprogramming For Sx-Aurora Tsubasa?
0
0.34
2021
Xevolver: A code transformation framework for separation of system-awareness from application codes.
0
0.34
2020
Online MPI Process Mapping for Coordinating Locality and Memory Congestion on NUMA Systems.
0
0.34
2020
Exploiting the Potentials of the Second Generation SX-Aurora TSUBASA
0
0.34
2020
DeLoc: A Locality and Memory-Congestion-Aware Task Mapping Method for Modern NUMA Systems
0
0.34
2020
An Energy-aware Dynamic Data Allocation Mechanism for Many-channel Memory Systems.
0
0.34
2019
Performance Evaluation of Different Implementation Schemes of an Iterative Flow Solver on Modern Vector Machines
0
0.34
2019
A Layer-Adaptable Cache Hierarchy by a Multiple-layer Bypass Mechanism
0
0.34
2019
An OpenCL-Like Offload Programming Framework for SX-Aurora TSUBASA
0
0.34
2019
Peachy Parallel Assignments (EduHPC 2019)
1
0.40
2019
An Automatic MPI Process Mapping Method Considering Locality and Memory Congestion on NUMA Systems
0
0.34
2019
The Impacts of Locality and Memory Congestion-aware Thread Mapping on Energy Consumption of Modern NUMA Systems
0
0.34
2019
Use Of Code Structural Features For Machine Learning To Predict Effective Optimizations
0
0.34
2018
Investigating the Effects of Dynamic Thread Team Size Adjustment for Irregular Applications
0
0.34
2018
An Adjacent-Line-Merging Writeback Scheme for STT-RAM-Based Last-Level Caches.
1
0.44
2018
Risk Management of Heatstroke Based on Fast Computation of Temperature and Water Loss Using Weather Data for Exposure to Ambient Heat and Solar Radiation.
0
0.34
2018
An energy-aware set-level refreshing mechanism for eDRAM last-level caches
0
0.34
2018
A Failure Prediction-Based Adaptive Checkpointing Method with Less Reliance on Temperature Monitoring for HPC Applications.
0
0.34
2018
Performance and Power Analysis of SX-ACE Using HP-X Benchmark Programs.
0
0.34
2017
An Adaptive Demotion Policy for High-Associativity Caches.
0
0.34
2017
Potential of a modern vector supercomputer for practical applications: performance evaluation of SX-ACE.
2
0.51
2017
Designing an Open Database of System-Aware Code Optimizations
0
0.34
2017
An Adjacent-Line-Merging Writeback Scheme for STT-RAM last-level caches
0
0.34
2017
A Directive Generation Approach to High Code-Maintainability for Various HPC Systems.
0
0.34
2017
An application-adaptive data allocation method for multi-channel memory
0
0.34
2017
A Memory Congestion-Aware MPI Process Placement for Modern NUMA Systems
2
0.43
2017
An Application-Level Incremental Checkpointing Mechanism with Automatic Parameter Tuning
0
0.34
2017
Effects of Stacking Granularity on 3-D Stacked Floating-point Fused Multiply Add Units.
0
0.34
2016
A Directive Generation Approach Using User-Defined Rules
0
0.34
2016
Translation of Large-Scale Simulation Codes for an OpenACC Platform Using the Xevolver Framework.
0
0.34
2016
A Memory-Efficient Implementation of a Plasmonics Simulation Application on SX-ACE.
0
0.34
2016
Flexii: A Flexible Insertion Policy For Dynamic Cache Resizing Mechanisms
0
0.34
2015
Design of a 3-D stacked floating-point Goldschmidt divider
0
0.34
2015
Migration of an Atmospheric Simulation Code to an OpenACC Platform Using the Xevolver Framework.
3
0.48
2015
A Case Study of Memory Optimization for Migration of a Plasmonics Simulation Application to SX-ACE.
0
0.34
2015
An energy-efficient dynamic memory address mapping mechanism
0
0.34
2015
On-chip checkpointing with 3D-stacked memories
0
0.34
2014
An energy optimization method for vector processing mechanisms
0
0.34
2014
An impact of circuit scale on the performance of 3-D stacked arithmetic units
1
0.37
2014
Mvp-Cache: A Multi-Banked Cache Memory For Energy-Efficient Vector Processing Of Multimedia Applications
0
0.34
2014
A Compiler-Assisted OpenMP Migration Method Based on Automatic Parallelizing Information
1
0.40
2014
Design of a 3-D stacked floating-point adder.
1
0.37
2013
A Capacity-Aware Thread Scheduling Method Combined With Cache Partitioning To Reduce Inter-Thread Cache Conflicts
1
0.36
2013
A flexible insertion policy for dynamic cache resizing mechanisms
1
0.36
2013
Design and evaluation of a media-oriented vector processor with a multi-banked cache memory
1
0.36
2013
An out-of-order vector processing mechanism for multimedia applications
0
0.34
2012
A capacity-efficient insertion policy for dynamic cache resizing mechanisms
0
0.34
2012
A media-oriented vector architectural extension with a high bandwidth cache system
0
0.34
2012
Abstract: Exploring Design Space of a 3D Stacked Vector Cache
0
0.34
2012
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