Name
Title | ||
|---|---|---|
An architecture for region boundary extraction in raster scan images suitable for VLSI implementation |
Abstract | ||
|---|---|---|
A novel hardware architecture for extracting region boundaries in two raster scan passes through a binary image is presented. The first pass gathers statistics regarding the size of each object contour. This information is used by the hardware to allocate dynamically off-chip memory for storage of boundary codes. In the second raster pass the same architecture constructs lists of grid-joint codes to represent the perimeter pixels of each object. These codes, referred to variously as “crack” codes or “raster-chain” codes in the literature, are later decoded by the hardware to reproduce the ordered sequence of coordinates surrounding each object. This list of coordinates is useful for a variety of shape recognition and manipulation algorithms that utilize boundary information. We present results of software simulations of the VLSI architecture, along with measurements on the coding efficiency of the basic algorithm, and estimates of the overall complexity of a proposed VLSI chip. |
Year | DOI | Venue |
|---|---|---|
1989 | 10.1007/BF01215875 | Mach. Vis. Appl. |
Keywords | Field | DocType |
segmentation,boundary-coding,raster scan,VLSI,architectures | Computer vision,Raster graphics,Computer science,Binary image,Image processing,Raster scan,Artificial intelligence,Pixel,Systems architecture,Very-large-scale integration,Hardware architecture | Journal |
Volume | Issue | Citations |
2 | 4 | 1 |
PageRank | References | Authors |
0.44 | 12 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| James M. Apffel | 1 | 1 | 0.44 |
| K. Wayne Current | 2 | 58 | 12.64 |
| Jorge Sanz | 3 | 327 | 42.78 |
| Anil Jain | 4 | 33507 | 3334.84 |