Paper Info
Title
MultiNoC: A Multiprocessing System Enabled by a Network on Chip
Abstract
The MultiNoC system implements a programmable on-chip multiprocessing platform built on top of an efficient, low area overhead intra-chip interconnection scheme. The employed interconnection structure is a Network on Chip, or NoC. NoCs are emerging as a viable alternative to increasing demands on interconnection architectures, due to the following characteristics: (i) energy efficiency and reliability; (ii) scalability of bandwidth, when compared to traditional bus architectures; (iii) reusability; (iv) distributed routing decisions. An external host computer feeds MultiNoC with application instructions and data. After this initialization procedure, MultiNoC executes some algorithm. After finishing execution of the algorithm, output data can be read back by the host. Sequential or parallel algorithms conveniently adapted to the MultiNoC structure can be executed. The main motivation to propose this design is to enable the investigation of current trends to increase the number of embedded processors in SoCs, leading to the concept of "sea of processors" systems.
Year
DOI
Venue
2007
10.1109/DATE.2005.218
Proceedings of the conference on Design, Automation and Test in Europe - Volume 3
Keywords
DocType
Volume
parallel algorithm,multinoc system,output data,interconnection structure,multinoc structure,current trend,application instruction,external host computer,interconnection architecture,multiprocessing system,interconnection scheme,reusability,soc,network on a chip,bandwidth,parallel algorithms,system on chip,energy efficiency,network on chip,chip,scalability,energy efficient,embedded systems,routing,computer architecture,embedded processor
Journal
abs/0710.4843
ISSN
ISBN
Citations 
1530-1591
0-7695-2288-2
3
PageRank 
References 
Authors
0.55
6
4
Name
Order
Citations
PageRank
Aline Mello140921.26
Leandro Moller2191.81
Ney Calazans369743.13
Fernando Moraes472043.62