Name
Abstract | ||
|---|---|---|
Modern multi-core processors provide primitives to allow parallel programs to atomically perform selected operations. Unfortunately, the increasing number of gates in such processors leads to a higher probability of faults happening during the computation. In this paper, we perform a comparison between the robustness of such primitives with respect to faults, operating at a functional level. We focus on locks, the most widespread mechanism, and on transactional memories, one of the most promising alternatives. The results come from an extensive experimental campaign based upon simulation of the considered systems. We show that locks prove to be a more robust synchronization primitive, because their vulnerable section is smaller. On the other hand, transactional memory is more likely to yield an observable wrong behaviour in the case of a fault, and this could be used to detect and correct the error. We also show that implementing locks on top of transactional memory increases its robustness, but without getting on par with that offered by locks. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/DFT.2011.28 | DFT |
Keywords | Field | DocType |
modern multi-core processor,higher probability,observable wrong behaviour,increasing number,transactional memory,extensive experimental campaign,vulnerable section,synchronization primitives,functional level,parallel program,promising alternative,parallel programming,multi core processor,synchronisation | Synchronization,Observable,Computer science,Parallel computing,Robustness (computer science),Real-time computing,Transactional memory,Storage management,Transactional leadership,Computation | Conference |
ISSN | Citations | PageRank |
1550-5774 | 0 | 0.34 |
References | Authors | |
10 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Paolo Roberto Grassi | 1 | 28 | 4.07 |
| Mariagiovanna Sami | 2 | 314 | 39.98 |
| Ettore Speziale | 3 | 1 | 1.04 |
| Michele Tartara | 4 | 15 | 2.03 |