Name
Abstract | ||
|---|---|---|
An eye detection technique to detect maximum vertical eye opening points for data recovery circuit (CDR) applications and the circuit implementation of an eye detector (ED) are reported in this paper. The ED samples the incoming data to generate the retimed data and produces an error signal indicating whether the sampling point leads or lags the maximum eye opening point, where the lowest BER is expected. The ED is implemented in CMOS 0.18mum technology, and its feasibility is confirmed by transistor-level simulations |
Year | DOI | Venue |
|---|---|---|
2006 | 10.1109/ISCAS.2006.1693794 | ISCAS |
Keywords | Field | DocType |
cmos integrated circuits,bit error rate,eye detection,clock recovery,cmos technology,clocks,data recovery circuit,detector circuits,error statistics,0.18 micron,synchronisation,synchronization,threshold voltage,detectors,signal analysis,circuits,data mining,sampling methods | Signal processing,Synchronization,Clock recovery,Computer science,Electronic engineering,CMOS,Data recovery,Computer hardware,Electronic circuit,Detector,Bit error rate | Conference |
ISSN | ISBN | Citations |
0271-4302 | 0-7803-9389-9 | 0 |
PageRank | References | Authors |
0.34 | 2 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jingcheng Zhuang | 1 | 76 | 12.41 |
| Qingjin Du | 2 | 37 | 7.26 |
| Tad A. Kwasniewski | 3 | 43 | 13.71 |