Name
Abstract | ||
|---|---|---|
One of the challenges in designing high-performance FPGA applications is fine-tuning the use of limited on-chip memory storage among many buffers in an application. To achieve desired performance the designer faces the burden of packaging such buffers into on-chip memories and manually optimizing the utilization of each memory and the throughput of each buffer. In addition, the application memories may not match the word width or depth of the physical on-chip memories available on the FPGA. This process is time consuming and non-trivial, particularly with a large number of buffers of various depths and bit widths. We propose a tool, MPack, which globally optimizes on-chip memory use across all buffers for stream applications. The goal is to speed up development time by providing rapid design space exploration and relieving the designer of lengthy low-level iterations. We introduce new high-level pragmas allowing the user to specify global memory requirements, such as an application's on-chip memory budget and data throughput. We allow the user to quickly generate a large number of memory solutions and explore the trade-off between memory usage and achievable throughput. To demonstrate the effectiveness of our tool, we apply the new high-level pragmas to an image processing benchmark. MPack effectively explores the design space and is able to produce a large number of memory solutions ranging from 10 to 100% in throughput, and from 12 to 100% in on-chip memory usage. |
Year | DOI | Venue |
|---|---|---|
2014 | 10.1145/2554688.2554761 | FPGA |
Keywords | Field | DocType |
global memory requirement,memory usage,on-chip memory budget,global memory optimization,large number,new high-level pragmas,stream application,limited on-chip memory storage,memory solution,application memory,on-chip memory usage,high-level synthesis,on-chip memory,stream computing,fpga | Semiconductor memory,Interleaved memory,Uniform memory access,Extended memory,Physical address,Computer science,Parallel computing,Distributed memory,Real-time computing,Memory management,Flat memory model,Embedded system | Conference |
Citations | PageRank | References |
1 | 0.35 | 2 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jasmina Vasiljevic | 1 | 23 | 3.17 |
| Paul Chow | 2 | 868 | 119.97 |