| AIgean: An Open Framework for Deploying Machine Learning on Heterogeneous Clusters | 0 | 0.34 | 2022 |
| A Framework Integrating FPGAs in VNF Networks | 0 | 0.34 | 2021 |
| Interactive Debugging at IP Block Interfaces in FPGAs | 0 | 0.34 | 2021 |
| Pharos: a Multi-FPGA Performance Monitor | 0 | 0.34 | 2021 |
| Pharos: a Performance Monitor for Multi-FPGA Systems | 0 | 0.34 | 2021 |
| Exploring PGAS Communication for Heterogeneous Clusters with FPGAs | 0 | 0.34 | 2021 |
| FFIVE: An FPGA Framework for Interactive VNF Environments | 0 | 0.34 | 2021 |
| FPGA Implementation of an Improved OMP for Compressive Sensing Reconstruction | 0 | 0.34 | 2021 |
| RIFL: A Reliable Link Layer Network Protocol for FPGA-to-FPGA Communication | 0 | 0.34 | 2021 |
| Hierarchical Modelling of Generators in Design-Space Exploration | 0 | 0.34 | 2020 |
| SHIP: Storage for Hybrid Interconnected Processors | 0 | 0.34 | 2020 |
| AIgean: An Open Framework for Machine Learning on Heterogeneous Clusters | 1 | 0.36 | 2020 |
| Accelerating Apache Spark with FPGAs. | 1 | 0.38 | 2019 |
| The Network Management Unit (NMU) - Securing Network Access for Direct-Connected FPGAs. | 0 | 0.34 | 2019 |
| A Modular Heterogeneous Stack for Deploying FPGAs and CPUs in the Data Center. | 2 | 0.38 | 2019 |
| Sonar: Writing Testbenches through Python | 0 | 0.34 | 2019 |
| Introducing ReCPRI: A Field Re-configurable Protocol for Backhaul Communication in a Radio Access Network | 0 | 0.34 | 2019 |
| Multi-fidelity Optimization for High-Level Synthesis Directives | 0 | 0.34 | 2018 |
| Hls-Based Fpga Acceleration Of Light Propagation Simulation In Turbid Media | 0 | 0.34 | 2018 |
| A High-Level Synthesis Case Study on Light Propagation Simulation in Turbid Media | 1 | 0.39 | 2018 |
| Galapagos: A Full Stack Approach to FPGA Integration in the Cloud. | 2 | 0.69 | 2018 |
| Designing for FPGAs in the Cloud. | 3 | 0.48 | 2018 |
| FPGA-based training of convolutional neural networks with a reduced precision floating-point library | 1 | 0.34 | 2017 |
| Enabling network function virtualization over heterogeneous resources. | 0 | 0.34 | 2017 |
| Building the Reconfigurable Cloud Ecosystem. | 0 | 0.34 | 2017 |
| Task replication and control for highly parallel in-memory stores. | 0 | 0.34 | 2017 |
| Enabling Flexible Network FPGA Clusters in a Heterogeneous Cloud Data Center. | 10 | 0.75 | 2017 |
| An FPGA-based processor for training convolutional neural networks | 1 | 0.36 | 2017 |
| Build fast, trade fast: FPGA-based high-frequency trading using high-level synthesis | 1 | 0.43 | 2017 |
| Packet Matching on FPGAs Using HMC Memory: Towards One Million Rules. | 1 | 0.37 | 2017 |
| Enabling FPGAs as a True Device in the OpenCL Standard: Bridging the Gap for FPGAs | 0 | 0.34 | 2017 |
| Extracting Designs of Secure IPs Using FPGA CAD Tools. | 0 | 0.34 | 2016 |
| A Scalable Heterogeneous Dataflow Architecture For Big Data Analytics Using FPGAs (Abstract Only). | 2 | 0.40 | 2016 |
| Model-based optimization of High Level Synthesis directives | 2 | 0.38 | 2016 |
| Caffeinated FPGAs: FPGA framework For Convolutional Neural Networks | 6 | 0.60 | 2016 |
| Accelerating Apache Spark Big Data Analysis with FPGAs | 1 | 0.37 | 2016 |
| OpenCL library of stream memory components targeting FPGAs | 2 | 0.39 | 2015 |
| Architecture Exploration for Data Intensive Applications | 0 | 0.34 | 2015 |
| FPGA implementation of low-power and high-PSNR DCT/IDCT architecture based on adaptive recoding CORDIC | 1 | 0.37 | 2015 |
| Exploring pipe implementations using an OpenCL framework for FPGAs | 3 | 0.47 | 2015 |
| UT-OCL: an OpenCL framework for embedded systems using xilinx FPGAs | 3 | 0.55 | 2015 |
| Expanding OpenFlow Capabilities with Virtualized Reconfigurable Hardware | 2 | 0.36 | 2015 |
| Software/Hardware Parallel Long-Period Random Number Generation Framework Based on the WELL Method | 0 | 0.34 | 2014 |
| A Heterogeneous GASNet Implementation for FPGA-accelerated Computing | 1 | 0.38 | 2014 |
| FPGAs in the Cloud: Booting Virtualized Hardware Accelerators with OpenStack. | 63 | 3.17 | 2014 |
| Benefits of Adding Hardware Support for Broadcast and Reduce Operations in MPSoC Applications | 6 | 0.75 | 2014 |
| MPack: global memory optimization for stream applications in high-level synthesis | 1 | 0.35 | 2014 |
| Zcluster: A Zynq-Based Hadoop Cluster | 19 | 0.93 | 2013 |
| SimXMD: Simulation-based HW/SW co-debugging | 0 | 0.34 | 2013 |
| Simulation-Based Hw/Sw Co-Debugging For Field-Programmable Systems-On-Chip | 1 | 0.37 | 2013 |
