Name
Abstract | ||
|---|---|---|
Cross-ISA system-mode emulation has many important applications. For example, Cross-ISA system-mode emulation helps computer architects and OS developers trace and debug kernel execution-flow efficiently by emulating a slower platform (such as ARM) on a more powerful plat-form (such as an x86 machine). Cross-ISA system-mode emulation also enables workload consolidation in data centers with platforms of different instruction-set architectures (ISAs). However, system-mode emulation is much slower. One major overhead in system-mode emulation is the multi-level memory address translation that maps guest virtual address to host physical address. Shadow page tables (SPT) have been used to reduce such overheads, but primarily for same-ISA virtualization. In this paper we propose a novel approach called embedded shadow page tables (ESPT). EPST embeds a shadow page table into the address space of a cross-ISA dynamic binary translation (DBT) and uses hardware memory management unit in the CPU to translate memory addresses, instead of software translation in a current DBT emulator like QEMU. We also use the larger address space on modern 64-bit CPUs to accommodate our DBT emulator so that it will not interfere with the guest operating system. We incorporate our new scheme into QEMU, a popular, retargetable cross-ISA system emulator. SPEC CINT2006 benchmark results indicate that our technique achieves an average speedup of 1.51 times in system mode when emulating ARM on x86, and a 1.59 times speedup for emulating IA32 on x86_64. |
Year | DOI | Venue |
|---|---|---|
2014 | 10.1145/2576195.2576201 | VEE |
Keywords | Field | DocType |
shadow page table,dbt emulator,physical address,larger address space,address space,cross-isa system-mode emulation,maps guest virtual address,system-mode emulation,multi-level memory address translation,memory address,efficient memory virtualization,cross-isa system mode emulation | Programming language,Physical address,Computer science,Real-time computing,Memory address,Hardware emulation,Virtual memory,Parallel computing,Page table,Emulation,Memory virtualization,Memory management unit,Operating system | Conference |
Volume | Issue | ISSN |
49 | 7 | 0362-1340 |
Citations | PageRank | References |
9 | 0.52 | 10 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Chao-Jui Chang | 1 | 19 | 1.42 |
| Jan-Jan Wu | 2 | 550 | 59.21 |
| Wei-Chung Hsu | 3 | 719 | 58.87 |
| Pangfeng Liu | 4 | 661 | 69.35 |
| Pen-Chung Yew | 5 | 1430 | 133.52 |