Name
Abstract | ||
|---|---|---|
Simulation at the gate level is computationally very expensive.Parallel processing is one technique to reduce simulation time.Possessing knowledge of the distribution of computational activity insimulation can aid in parallelizing it efficiently. We present a newcharacterization of the distribution of the computational workload infault simulation. An empirical analysis shows that the workloaddistribution is circuit specific, and is largely independent of thevector set being simulated. An inexpensive method to predict theworkload distribution is also discussed. |
Year | DOI | Venue |
|---|---|---|
1997 | 10.1023/A:1008275810655 | J. Electronic Testing |
Keywords | Field | DocType |
fault simulation,logic simulation,parallel simulation,parallelization,workload distribution | Parallel simulation,Computer science,Workload,Parallel processing,Parallel computing,Real-time computing,Logic simulation,Dynamic simulation | Journal |
Volume | Issue | ISSN |
10 | 3 | 1573-0727 |
Citations | PageRank | References |
7 | 0.80 | 10 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Minesh B. Amin | 1 | 162 | 10.36 |
| Bapiraju Vinnakota | 2 | 237 | 25.36 |