Paper Info
Title
Analog performance space exploration by Fourier-Motzkin elimination with application to hierarchical sizing
Abstract
Analog performance space exploration identifies the range of feasible performance values of a given circuit topology. It is an extremely challenging task of great importance to topology selection and hierarchical sizing. In this paper, a novel technique for the efficient simulation-based exploration of high-dimensional performance spaces is presented. To this end, fundamental circuit design knowledge is described by constraint functions. Based on a linearization of the latter and of the circuit performance functions, a description of the feasible performance range in the form of a polytope is derived. Moreover, the approach is integrated into a hierarchical sizing method, where it propagates topological and technological constraints bottom-up. Practical application results demonstrate the efficiency and usefulness of the new method.
Year
DOI
Venue
2004
10.1109/ICCAD.2004.1382693
ICCAD
Keywords
Field
DocType
fourier analysis,bottom up,circuit design,integrated circuit design,network topology
Mathematical optimization,Fourier–Motzkin elimination,Computer science,Circuit extraction,Circuit design,Electronic engineering,Physical design,Integrated circuit development,Electronic circuit simulation,Equivalent circuit,Topology (electrical circuits)
Conference
ISBN
Citations 
PageRank 
0-7803-8702-3
11
0.90
References 
Authors
12
3
Name
Order
Citations
PageRank
Guido Stehr1826.90
Helmut E. Graeb226936.22
Kurt Antreich319026.09